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IBM Journal of Research and Development

Soft Errors in Circuits and Systems   Volume 52, Number 3, 2008
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Circuit design and modeling for soft errors - Author Bios

by A. KleinOsowski,
E. H. Cannon,
P. Oldiges,
and L. Wissel
Biographical sketches of authors

AJ KleinOsowski IBM Austin Research Laboratory, Research Division, 11501 Burnet Road, Austin, Texas 78758 (ajko@us.ibm.com). Dr. KleinOsowski completed her M.S. and Ph.D. degrees in electrical engineering at the University of Minnesota in 2000 and 2004, respectively. She received her B.S. (with honors) in computer science and electrical engineering at the University of Wisconsin at Milwaukee in 1999. She is now a Research Staff Member at the IBM Austin Research Laboratory in Texas. Dr. KleinOsowski's research centers on fault-tolerant circuit and VLSI design for exploratory device technologies. She is a member of the IEEE.

Ethan H. Cannon IBM Systems and Technology Group, 1000 River Street, Essex Junction, Vermont 05452 (cannon1@us.ibm.com). Dr. Cannon received a B.S. degree in engineering physics from the University of California, Berkeley in 1994, and M.S. and Ph.D. degrees in physics from the University of Illinois at Urbana–Champaign in 1995 and 1999, respectively. After postdoctoral studies at the University of Notre Dame, he joined IBM in Essex Junction, Vermont. Currently, he is a Reliability Engineer focusing on soft-error simulations and measurements.

Phil Oldiges IBM Semiconductor Research and Development Center, Systems and Technology Group, Hopewell Junction, New York 12533 (poldiges@us.ibm.com). Dr. Oldiges received a B.S. degree in physics from Thomas More College in 1981, and M.S. and Ph.D. degrees in electrical engineering from Cornell University in 1984 and 1988, respectively. From 1984 to 1986, he was a Visiting Research Scientist at Toshiba Corporation in Kawasaki, Japan, investigating the dynamics of alpha-particle-induced charge collection in dynamic memories. From 1988 to 1993, he worked at Sony Corporation, Atsugi, Japan, developing physical models for device simulation. From 1993 to 1998, he worked in the TCAD Group at Digital Equipment Corporation in Hudson, Massachusetts, developing models for front-end process simulation and tools for soft-error evaluation of SRAM and logic. Currently, Dr. Oldiges is Manager of the Research TCAD Group with the IBM Systems and Technology Group in Hopewell Junction, New York, and he is responsible for front-end process and device models for the 32-nm technology node and beyond. He is a member of the IEEE, Tau Beta Pi, and Sigma Pi Sigma.

Larry Wissel IBM Systems and Technology Group, 1000 River Street, Essex Junction, Vermont 05452 (wissel@us.ibm.com). Mr. Wissel received a B.S. degree in engineering physics from Cornell University in 1975. He served as an officer in the U.S. Navy until 1979, after which he joined IBM in Essex Junction, Vermont. He has designed memories, I/O circuits, and other custom circuits in ASIC technologies from 1.5 μm to 65 nm. Mr. Wissel is currently the ASICs leader on soft-error analysis and measurement.


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