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IBM Journal of Research and Development

Cell Broadband Engine Technology and Systems   Volume 51, Number 5, 2007
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Cell Broadband Engine processor vault security architecture - Author Bios

by K. Shimizu,
H. P. Hofstee,
and J. S. Liberty
Biographical sketches of authors

Kanna Shimizu IBM Systems and Technology Group, 11501 Burnet Road, Austin, Texas 78758 (kannas@us.ibm.com). Dr. Shimizu is the Cell/B.E. Processor and Systems Security Architect. She currently leads the development of security software architecture on Cell/B.E. processor platforms and consults on future processor security architectures. She received a Ph.D. degree in electrical engineering from Stanford University, an M.S. degree in computer science from the University of Oxford, and a B.S. degree in electrical engineering from the California Institute of Technology.

H. Peter Hofstee IBM Systems and Technology Group, STI Design Center, 11400 Burnet Road, Austin, Texas 78758 (hofstee@us.ibm.com). Dr. Hofstee received his doctorandus degree in theoretical physics from the Rijks Universiteit Groningen, The Netherlands, in 1988, and his M.S. and Ph.D. degrees in computer science from the California Institute of Technology in 1991 and 1994, respectively. After two years on the faculty at Caltech, in 1996 he joined the IBM Austin Research Laboratory, where he participated in the design of two 1-GHz PowerPC prototypes, focusing on microarchitecture, logic design, and chip integration. In 2000 he helped start the Sony–Toshiba–IBM (STI) Design Center to design a next generation of processors for the broadband era, the Cell/B.E. processor. Dr. Hofstee is a member of the CBEA team and the Chief Architect of the synergistic processor in the Cell/B.E. processor. He was elected to the IBM Academy of Technology in 2004.

John S. Liberty IBM Systems and Technology Group, 11501 Burnet Road, Austin, Texas 78758. Mr. Liberty received B.S. and M.S. degrees in electrical engineering from North Carolina State University. He is an Advisory Engineer in the STI Design Center, responsible for helping architect and develop the Cell/B.E. processor. His main focus within the Cell/B.E. processor is the SPU SIMD processor. He was a leader in designing the SPU channel interface and the SPU inherent security architecture. Before working on the Cell/B.E. processor, he was a designer working on graphic processing units. Mr. Liberty holds four patents, with 12 patents pending; he has co-authored three technical articles.


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