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IBM Journal of Research and Development
Cell Broadband Engine Technology and Systems   Volume 51, Number 5, 2007
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CellSs: Making it easier to program the Cell Broadband Engine processor - References

 by J. M. Perez,
P. Bellens,
R. M. Badia,
and J. Labarta
References

  1. D. Geer, “Chip Makers Turn to Multicore Processors,” Computer 38, No. 5, 11–13 (2005).
  2. K. Asanovic, R. Bodik, B. C. Catanzaro, J. J. Gebis, P. Husbands, K. Keutzer, D. A. Patterson, et al., “The Landscape of Parallel Computing Research: A View from Berkeley,” Technical Report EECS-2006-183, University of California at Berkeley, 2006.
  3. D. Pham, S. Asano, M. Bolliger, M. N. Day, H. P. Hofstee, C. Johns, J. Kahle, et al., “The Design and Implementation of a First-Generation Cell Processor,” Proceedings of the IEEE International Solid-State Circuits Conference, San Francisco, CA, 2005, pp. 184–185.
  4. P. Bellens, J. M. Perez, R. M. Badia, and J. Labarta, “CellSs: A Programming Model for the Cell BE Architecture,” Proceedings of the ACM/IEEE SC2006 Conference on High Performance Networking and Computing, Tampa, FL, 2006, p. 86.
  5. A. E. Eichenberger, J. K. O'Brien, K. M. O'Brien, P. Wu, T. Chen, P. H. Oden, D. A. Prener, et al., “Using Advanced Compiler Technology to Exploit the Performance of the Cell Broadband Engine™ Architecture,” IBM Systems J. 45, No. 1, 59–84 (2006).
  6. Cell Broadband Engine Technology, GNU GCC Tools Upgraded to Version 4.1.1, IBM alphaWorks; see http://www.alphaworks.ibm.com/topics/cell.
  7. Code Example, Barcelona Supercomputing Center, 2007; see http://www.bsc.es/plantillaH.php?cat_id=183.
  8. J. Labarta, S. Girona, V. Pillet, T. Cortes, and L. Gregoris, “DiP: A Parallel Program Development Environment,” Proceedings of the 2nd International Euro-Par Conference on Parallel Processing, Lyon, France, 1996, pp. 665–674.
  9. IBM Corporation, IBM Software Development Kit (SDK) IBM Cell Broadband Engine Software Development Kit; see http://www.alphaworks.ibm.com/tech/cellsw.
  10. The Community of OpenMP Users, Researchers, Tool Developers, and Providers; see http://www.compunity.org/.
  11. IBM Corporation (September 6, 2006). IBM to Build World's First Cell Broadband Engine Based Supercomputer. Press release; see http://www-03.ibm.com/press/us/en/pressrelease/20210.wss.
  12. IBM Corporation, Software Development Kit 2.1 Accelerated Library Framework Programmer's Guide and API Reference Version 1.1; see http://df.unife.it/u/belletti/sdkdocs/ALFProgrammersGuideAndAPIRef_v1.1.pdf.
  13. A. Zhai, C. B. Colohan, J. G. Steffan, and T. C. Mowry, “Compiler Optimization of Scalar Value Communication Between Speculative Threads,” Proceedings of the 10th International Conference on Architectural Support for Programming Languages and Operating Systems, San Jose, CA, 2002, pp. 171–183.
  14. K. Fatahalian, T. J. Knight, M. Houston, M. Erez, D. R Horn, L. Leem, J. Y. Park, et al., “Sequoia: Programming the Memory Hierarchy,” Proceedings of the ACM/IEEE Conference on Supercomputing, Tampa, FL, 2006, p. 4.
  15. RapidMind, Inc., “Cell BE Porting and Tuning with RapidMind: A Case Study,” white paper; see http://www.rapidmind.net/case-cell.php.
  16. M. Ohara, H. Inoue, Y. Sohda, H. Komatsu, and T. Nakatani, “MPI Microtask for Programming the Cell Broadband Engine™ Processor,” IBM Systems J. 45, No. 1, 85–102 (2006).
  17. T. Yang and A. Gerasoulis, “A Fast Static Scheduling Algorithm for DAGs on an Unbounded Number of Processors,” Proceedings of the ACM/IEEE Conference on Supercomputing, Albuquerque, NM, 1991, pp. 633–642.
  18. N. Galoppo, N. K. Govindaraju, M. Henson, and D. Manocha, “LU-GPU: Efficient Algorithms for Solving Dense Linear Systems on Graphics Hardware,” Proceedings of the ACM/IEEE Conference on Supercomputing, Seattle, WA, 2005, p. 3.
  19. Z. Fan, F. Qiu, A. Kaufman, and S. Yoakum-Stover, “GPU Cluster for High Performance Computing,” Proceedings of ACM/IEEE Conference on Supercomputing, Pittsburgh, PA, 2004, p. 47.


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