Biographical sketches of authors

John A. Darringer IBM Research Division, Thomas J. Watson Research Center, P.O. Box 218, Yorktown Heights, New York 10598 (jad@us.ibm.com). Dr. Darringer received his Ph.D. degree from Carnegie Mellon University. He worked for Philips in The Netherlands and subsequently joined the IBM Research Division in Yorktown Heights, New York. He worked in program verification and logic synthesis, and has held several management positions, including Director of Large Systems Research, Director of Technical Planning for the Research Division, and Director of Electronic Design Automation in the IBM Microelectronics Division. He is currently managing a system-level design tools project in the Research Division. Dr. Darringer is an IEEE Fellow and Chairman of the Board of Directors for the Silicon Integration Initiative, a consortium focused on reducing the complexity of future DA systems.

Reinaldo A. Bergamaschi IBM Research Division, Thomas J. Watson Research Center, P.O. Box 218, Yorktown Heights, New York 10598 (berga@us.ibm.com). Dr. Bergamaschi graduated in electronics engineering (with honors) from the Aeronautics Institute of Technology, Sao Jose dos Campos, Brazil, in 1982; in 1984 he received the M.E.E. degree (with distinction) from the Philips International Institute, Eindhoven, The Netherlands. In 1989 he received the Ph.D. degree in electronics and computer science from the University of Southampton, England, joining the IBM Thomas J. Watson Research Center in Yorktown Heights, New York, where he is currently involved with system-level design tools. Dr. Bergamaschi's main interests are in design methodology and algorithms for high-level and system-level synthesis, and embedded systems.

Subhrajit Bhattacharya IBM Research Division, Thomas J. Watson Research Center, P.O. Box 218, Yorktown Heights, New York 10598 (sbhat@us.ibm.com). Dr. Bhattacharya received his B.S. degree in computer science and engineering from the Indian Institute of Technology, Kharagpur, and his Ph.D. degree from Duke University. He is currently a Research Staff Member at the IBM Thomas J. Watson Research Center, Yorktown Heights, New York. His research interests include system-level design automation, synthesis, and design for test.

Daniel Brand IBM Research Division, Thomas J. Watson Research Center, P.O. Box 218, Yorktown Heights, New York 10598 (danbrand@us.ibm.com). Dr. Brand received the B.Sc., M.S., and Ph.D. degrees in computer science from the University of Toronto, Ontario, Canada, in 1972, 1973, and 1976, respectively. He has held faculty/research positions at the IBM Zurich Research Laboratory, the Beijing Institute of Aeronautics and Astronautics, and the Kyushu Institute of Technology. He is currently a Research Staff Member at the IBM Thomas J. Watson Research Center, Yorktown Heights, New York. His research areas include logic optimization, performance analysis, and hardware and software reliability. Dr. Brand is a Fellow of the IEEE.

Andreas Herkersdorf IBM Research Division, Zurich Research Laboratory, Saumerstrasse 4, 8803 Ruschlikon, Switzerland (anh@zurich.ibm.com). Dr. Herkersdorf received a Dipl.-Ing. degree in electrical engineering from the Technical University of Munich, Germany, in 1987, and a Ph.D., also in electrical engineering, from the Swiss Federal Institute of Technology (ETH), Zurich, in 1991. Since 1988 he has been with the IBM Zurich Research Laboratory, where he currently manages the Network Processor Hardware group. His areas of interest are high-speed communication networks and systems, and VLSI design methodologies.

Joseph K. Morrell IBM Microelectronics Division, East Fishkill facility, Hopewell Junction, New York 12533 (jkmorrell@us.ibm.com). Mr. Morrell, a Senior Technical Staff Member in the Microelectronics Division, received a B.E. degree from the Stevens Institute of Technology in 1971. Within the Electronic Design Automation organization, he has spent more than 25 years developing design automation capabilities ranging from circuit design, layout, and checking tools to chip floorplanning, synthesis, and detailed physical design. Mr. Morrell is currently leading the development of the unified synthesis and physical design system; he is the chief architect for the Integrated Data Model, a fundamental component of this work.

Indira I. Nair IBM Research Division, Thomas J. Watson Research Center, P.O. Box 218, Yorktown Heights, New York 10598 (indira@us.ibm.com). Ms. Nair received her B.Tech. degree in chemical engineering from the Indian Institute of Technology, Bombay, and her M.S.E. degree in computer science from Princeton University. She joined IBM in 1984 and currently works in the System-Level Design group, primarily on performance analysis for system-on-a-chip designs.

Patricia Sagmeister IBM Research Division, Zurich Research Laboratory, Saumerstrasse 4, 8803 Ruschlikon, Switzerland (psa@zurich.ibm.com). Dr. Sagmeister received a Dipl.-Inform. degree in computer science from the University of Passau, Germany, in 1993 and a Ph.D. degree in computer science from the University of Stuttgart, Germany, in 2000. In 1999 she joined IBM, where she is currently a member of the Network Processor Hardware group. Her areas of interest are system-level design, architectural performance evaluation, and hardware/software co-design.

Youngsoo Shin IBM Research Division, Thomas J. Watson Research Center, P.O. Box 218, Yorktown Heights, New York 10598 (youngsoo@us.ibm.com). Dr. Shin received B.S., M.S., and Ph.D. degrees in electronics engineering from Seoul National University, Korea, in 1994, 1996, and 2000, respectively. He subsequently joined the Center for Collaborative Research at the University of Tokyo, Japan, working as a research associate. Dr. Shin joined the IBM Research Division in 2001, working on system-level and low-power design.