Biographical sketches of authors

Hubert Harrer   IBM Deutschland Entwicklung GmbH, Schoenaicherstrasse 220, 71032 Boeblingen, Germany (hharrer@de.ibm.com). Dr. Harrer is a Senior Engineer working in the IBM Server Group. He received his Dipl.-Ing. degree in 1989 and his Ph.D. degree in 1992 from the Technical University of Munich. In 1993 he received a DFG research grant to work at the University of California at Berkeley. Since 1994 he has worked for IBM in the Packaging Department at IBM Boeblingen, leading the IBM MCM design team for the z900 server. In 1999 he was on international assignment at IBM Poughkeepsie, New York. Dr. Harrer's interests currently focus on the development of a new timing and noise-checking methodology for the IBM Server Division. He has published multiple papers and holds four patents in the area of first-level and second-level packaging.

Harald Pross   IBM Enterprise Server Group, Schoenaicherstrasse 220, 71032 Boeblingen, Germany (hpross@de.ibm.com). Mr. Pross is an Advisory Engineer working in the Enterprise Server Group. After joining IBM in 1975, he studied applied physics at the Fachhochschule Heilbronn from 1979 to 1984, graduating with a B.S. degree in physics in 1984 and joining the IBM Boeblingen laboratory that same year. He held various technical positions in S/390 processor packaging design in Boeblingen. In 1993 he moved to Rochester, Minnesota, to lead the card/board packaging design of the new high-end AS/400 processor. Returning to Boeblingen in 1994, he worked on various printed wiring board designs for S/390 processors. In 1997 Mr. Pross became the project leader for the Boeblingen processor card and board designs. Since 2000 he has led the overall packaging project for the zSeries 900 processor cage design and is responsible for the packaging implementation for future zSeries processors.

Thomas-Michael Winkel   IBM System/390 Division, Schoenaicherstrasse 220, 71032 Boeblingen, Germany (winkel@de.ibm.com). Dr. Winkel received his Diploma in electrical engineering in 1989 and his Ph.D. degree in 1997 from the University of Hannover, Germany. His research activities covered the area of characterization and modeling of on-chip interconnects using high-frequency measurements. In 1996 he joined the IBM development laboratory in Boeblingen, Germany. He is currently a Staff Engineer in the IBM Server Group, leading the electrical design team for the second-level packaging for the z900 CEC cage. Dr. Winkel's current focus is electrical packaging design with respect to high-frequency signal distribution and power noise. He is also interested in high-frequency on-chip measurements and modeling of on-chip signal as well as power and ground lines.

Wiren D. (Dale) Becker   IBM System/390 Division, 2455 South Road, Poughkeepsie, New York 12601. Dr. Becker received his B.E.E. degree from the University of Minnesota, his M.S.E.E. degree from Syracuse University, and his Ph.D. degree from the University of Illinois. He is currently a Senior Technical Staff Member in the IBM Server Group. He leads the MCM design team that integrates and implements the multiprocessor design for the IBM S/390 platforms. Dr. Becker has received IBM Outstanding Technical Achievement Awards for the design and development of G4, G6, and z900 MCM packaging and an IBM Outstanding Innovation Award for the G5 package development. He has authored or co-authored more than fifty journal articles and conference papers and has achieved the first IBM invention plateau. Dr. Becker's current interests focus on the electrical design of the components that comprise a high-frequency CMOS processor system. He specializes in the application of electromagnetic numerical methods to the issues of signal integrity and simultaneous switching noise in electronic packaging, the measurement of these phenomena, and the verification of the models. Dr. Becker is a member of the IEEE and IMAPS.

Herb I. Stoller   IBM Microelectronics Division, East Fishkill facility, Route 52, Hopewell Junction, New York 12533 (stollerh@us.ibm.com). Mr. Stoller is a Senior Technical Staff Member with the Microelectronics Division, responsible for application engineering for high performance and special MCMs. He has authored and coauthored numerous papers on MCMs and MCM technology. Mr. Stoller holds 12 patents and has reached the Fifth Invention Plateau. He holds a B.S. degree from City College of New York and an M.S. degree from Rutgers University, both in physics.

Masakazu Yamamoto   Hitachi Enterprise Server Division, Horiyamashita 1, Hadano, Kanagawa 259-1392, Japan (masakazu.yamamoto@itg.hitachi.co.jp). Mr. Yamamoto received the B.S. degree in physics from Kyoto University in 1977 and the M.S. degree in applied physics from Osaka University in 1979. He joined the Central Research Laboratory at Hitachi Ltd., where he worked on the development of high-speed packaging systems for large-scale computers. Since 1989, he has worked in the Enterprise Server Division of Hitachi Ltd. and engaged in the development of the packaging technology for large-scale computers such as the MP5800 and the Super Technical Server SR8000. He is currently a General Manager in the Enterprise Server Division of Hitachi Ltd., responsible for the hardware technologies of server and network systems.

Shinji Abe   Hitachi Enterprise Server Division, Horiyamashita 1, Hadano, Kanagawa 259-1392, Japan (shinji.abe@itg.hitachi.co.jp). Mr. Abe received B.E. and M.E. degrees in mechanical engineering from the University of Tokyo in 1986 and 1988, respectively, and the M.S. degree in electrical engineering from Stanford University in 1999. He joined the Enterprise Server Division of Hitachi Ltd. in 1988 and has been working in the Hardware Technology Development Department. He is currently a Senior Engineer, and is responsible for MCM design.

Bruce J. Chamberlin   IBM Microelectronics Division, 1701 North Street, Endicott, New York 13760 (chamberb@us.ibm.com). Mr. Chamberlin is a Senior Engineer in the Organic Packaging Development group at IBM Endicott. He holds a B.S. degree in mechanical engineering from Clarkson University. He has been the product engineer for Clark raw boards and for the Clark board assembly. He is currently the program manager for development and qualification of high-end PWBs supporting zSeries machines.

George A. Katopis   IBM System/390 Division, 2455 South Road, Poughkeepsie, New York 12601 (katopis@us.ibm.com). Mr. Katopis is a Distinguished Engineer in the IBM ESG Server Division, responsible for the technology selection and packaging strategy of CMOS servers. He has authored more than fifty papers on the subject of net design and switching-noise prediction and containment in the digital server engines. He holds three patents on switching-noise reduction and has coauthored chapters in three books on the electrical design of electronic packages. Mr. Katopis received an M.S. degree and an M.Ph. degree from Columbia University. He is an IEEE Fellow, and an industrial mentor to the electrical engineering departments of Cornell University and the University of Arizona at Tucson.