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IBM Journal of Research and Development  
Volume 46, Numbers 4/5, 2002
IBM eServer z900
 Table of contents: arrowHTML arrowPDF arrowASCII   This article: arrowHTML arrowPDF arrowASCII arrowCopyright info
   

RAS design for the IBM eServer z900 - References
by L. C. Alves, M. L. Fair, P. J. Meaney, C. L. Chen, W. J. Clarke, G. C. Wellwood, N. E. Weber, I. N. Modi, B. K. Tolan, and F. Freier

References

  1. M. Mueller, L. C. Alves, W. Fischer, M. L. Fair, and I. Modi, “RAS Strategy for IBM S/390 G5 and G6,” IBM J. Res. & Dev. 43, No. 5/6, 875–888 (1999).
  2. P. R. Turgeon, P. Mak, M. A. Blake, M. F. Fee, C. B. Ford, P. J. Meaney, R. Siegler, and W. W. Shen, “The S/390 G5/G6 Binodal Cache,” IBM J. Res. & Dev. 43, No. 5/6, 661–670 (1999).
  3. J. Probst, B. D. Valentine, C. Axnix, and K. Kuehl, “Flexible Configuration and Concurrent Upgrade for the IBM eServer z900,” IBM J. Res. & Dev. 46, No. 4/5, 551–558 (2002, this issue).
  4. C. L. Chen, “Symbol Error Correcting Codes for Memory Applications,” Proceedings of the 26th International Symposium on Fault-Tolerant Computing, June 1996, pp. 200–207.
  5. IBM Corporation, PR/SM Users Guide, Order No. SB10-7033-00; available through IBM branch offices.
  6. D. J. Stigliani, Jr., T. E. Bubb, D. F. Casper, J. H. Chin, S. G. Glassen, J. M. Hoke, V. A. Minassian, J. H. Quick, and C. H. Whitehead, “IBM eServer z900 I/O Subsystem,” IBM J. Res. & Dev. 46, No. 4/5, 421–445 (2002, this issue).
  7. F. Baitinger, H. Elfering, G. Kreissig, D. Metz, J. Saalmueller, and F. Scholz, “System Control Structure of the IBM eServer z900,” IBM J. Res. & Dev. 46, No. 4/5, 523–535 (2002, this issue).
  8. B. D. Valentine, H. Weber, and J. D. Eggleston, “The Alternate Support Element, a High-Availability Service Console for the IBM eServer z900,” IBM J. Res. & Dev. 46, No. 4/5, 559–566 (2002, this issue).
  9. W. J. Rooney, J. P. Kubala, J. Maergner, and P. B. Yocom, “Intelligent Resource Director,” IBM J. Res. & Dev. 46, No. 4/5, 567–586 (2002, this issue).
  10. S. Koerner, M. Kuenzel, and E. McCain, “z900 Server System Microcode Simulation: The Virtual Power-On Process—An Innovative Approach for Microcode Verification,” IBM J. Res. & Dev. 46, No. 4/5, 587–595 (2002, this issue).
  11. J. von Buttlar, H. Böhm, R. Ernst, A. Horsch, A. Kohler, H. Schein, M. Stetter, and K. Theurich, “z/CECSIM: An Efficient and Comprehensive Microcode Simulator for the IBM eServer z900,” IBM J. Res. & Dev. 46, No. 4/5, 607–615 (2002, this issue).
  12. J. Kayser, S. Koerner, and K.-D. Schubert, “Hyper-Acceleration and HW/SW Co-Verification as an Essential Part of IBM eServer z900 Verification,” IBM J. Res. & Dev. 46, No. 4/5, 597–605 (2002, this issue).
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