Biographical sketches of authors

Joel M. Tendler   IBM Server Group, 11400 Burnet Road, Austin, Texas 78758 (jtendler@us.ibm.com). Dr. Tendler is Program Director of Technology Assessment, responsible for assessing emerging technologies for applicability in future eServer iSeries and pSeries product offerings. He has extensive hardware and software design experience in S/390 and RS/6000 systems. Before assuming his current position, he was the lead performance analyst on the POWER4 project. Dr. Tendler received a B.E. degree in electrical engineering from the Cooper Union, and a Ph.D. degree in electrical engineering from Syracuse University. He has seven U.S. patents pending and one published; he has received a First Plateau IBM Invention Achievement Award.

J. Steve Dodson   IBM Server Group, 11400 Burnet Road, Austin, Texas 78758 (jsdodson@us.ibm.com). Mr. Dodson received his B.S.E.E. degree from the University of Kentucky in 1982 and joined IBM in 1983 in Lexington, Kentucky. While in Lexington, he worked in VLSI component engineering, performing characterization and reliability studies of various vendor SRAMs, EPROMs, and microcontrollers. He moved to Austin in 1987 as a logic designer on the first POWER microprocessors. After serving as the design lead for two I/O host bridge chip development efforts, he moved on to develop two generations of level-2 cache controller chips which were used in the RS/6000 Model F50 server and related products. He then joined the POWER4 team as team lead for the level-2 cache controller unit, and is currently involved in the development effort of a future POWER microprocessor as technical lead for the memory subsystem design. Mr. Dodson was appointed to the position of Senior Technical Staff Member in 2000. He has coauthored numerous patent applications in the areas of SMP cache coherency, cache hierarchy, and system bus protocols.

J. S. Fields, Jr. (Steve)   IBM Server Group, 11400 Burnet Road, Austin, Texas 78758 (sfields@us.ibm.com). Mr. Fields received a B.S.E.E. degree from the University of Illinois. He has designed I/O, memory, and cache subsystems for servers for 13 years. He was the lead designer on the POWER4 L3 cache, and led the hardware bringup and validation efforts for the POWER4 storage subsystem. Mr. Fields holds nine U.S. patents, with another 69 patents pending.

Hung Le   IBM Server Group, 11400 Burnet Road, Austin, Texas 78758 (hung@us.ibm.com). Mr. Le is a Senior Technical Staff Member in the POWER4 Development team in Austin, Texas. He joined IBM in 1979 after receiving a B.S. degree in electrical and computer engineering from Clarkson University. He has worked in the development of several ES/9000 mainframe CPUs as well as the POWER3 and POWER4 microprocessors. His technical interest is in superscalar and multithreading design. Mr. Le has received an IBM Outstanding Innovation Award and holds 31 issued patents.

Balaram Sinharoy   IBM Server Group, 522 South Road, Poughkeepsie, New York 12601 (balaram@us.ibm.com). Dr. Sinharoy is a Senior Engineer in the IBM advanced microprocessor design group, where he is currently the chief scientist and technical lead for a future POWER microprocessor. He designed the branch-prediction unit in POWER4 and led several architectural, design, performance, and verification aspects of the POWER4 design. Before joining the POWER4 microprocessor development group in 1996, Dr. Sinharoy worked in the IBM VLIW compiler and architecture research group on hardware multithreading. He joined IBM in 1992 after receiving his Ph.D. degree in computer science from Rensselaer Polytechnic Institute. He received the 1992 Robert McNaughton Award as a recognition of his research contributions. His research and development interests include advanced microprocessor design, computer architecture and performance analysis, instruction-level parallel processing, and compiler optimization. Dr. Sinharoy has published numerous articles and received patents in these areas. He has received a Sixth Plateau IBM Invention Achievement Award and a Third Plateau IBM Publication Achievement Award. Dr. Sinharoy is a Senior Member of IEEE and a member of ACM.