Biographical sketches of authors

Douglas C. Bossen   IBM Server Group, 11400 Burnet Road, Austin, Texas 78758 (dbossen@us.ibm.com). Dr. Bossen is a Distinguished Engineer specializing in computer hardware fault-tolerant design. He has designed and holds numerous patents on error-correcting codes, error-detecting logic, error-detection/fault-isolation techniques, and system availability techniques which are implemented in IBM systems 308X, 3090, ES/9000, and pSeries servers. Since joining IBM he has received two IBM Outstanding Innovation Awards and an IBM Corporate Award for his work on error detection and fault isolation. His current position in Server Group RAS Architecture requires focus on Server Group RAS competitive leadership by migrating the most cost-effective techniques within IBM's extensive portfolio into the pSeries and iSeries brands during product development. He has published 18 peer-reviewed journal articles, holds 24 issued and nine pending U.S. patents and 23 published disclosures, and has reached IBM's Tenth Invention Plateau. Dr. Bossen received the B.S., M.S., and Ph.D. degrees in electrical engineering, all from Northwestern University. He is a Fellow of the Institute of Electrical and Electronics Engineers and a member of the IBM Academy of Technology.

Alongkorn Kitamorn   IBM Server Group, 11400 Burnet Road, Austin, Texas 78758 (kitamorn@us.ibm.com). Mr. Kitamorn is a Senior Engineer specializing in system RAS architecture and design. He has designed and holds numerous patents on system availability and error-handling design which are implemented in IBM RS/6000 and pSeries servers. His current position in Server Group Engineering Software Architecture requires focus on architecture, design, and implementation of leading-edge RAS functions in iSeries and pSeries servers. Since joining IBM, he has received numerous Invention Achievement Awards and an Outstanding Technical Achievement Award. He has five issued and 14 pending U.S. patents and three published disclosures, and has reached IBM's Fourth Invention Plateau. He received the B.S. degree in computer science from Union College.

Kevin F. Reick   IBM Server Group, 11400 Burnet Road, Austin, Texas 78758 (reick@us.ibm.com). Mr. Reick is a Senior Technical Staff Member specializing in all aspects of system RAS and system debug design. Through his work on IBM S/390 machines, power-parallel nodes, and RS/6000 and AS/400 servers, and by his involvement in the introduction of numerous successful products, he has extensive experience in systems, storage, service processor and microprocessor architecture, architecture RAS design, system debug, and design for test. He is currently the POWER4 RAS Architect and had a lead role in POWER4 system bringup. He has two issued and 26 pending U.S. patents and four published disclosures, and has reached IBM's Fifth Invention Plateau.

Michael S. Floyd   IBM Server Group, 11400 Burnet Road, Austin, Texas 78758 (mfloyd@us.ibm.com). Mr. Floyd is a Staff Engineer specializing in RAS and debug design of microprocessors and systems. He has developed a “design for debug” approach and methodology to chip design for the IBM POWER family of servers. Mr. Floyd holds a master's degree in electrical engineering from Stanford University, with a focus on computer hardware design, test, and fault tolerance, and he received a bachelor's degree in computer engineering from the Georgia Institute of Technology. His nearly seven years of experience with IBM includes bringup, debug, and test of the PowerPC 620 microprocessor and POWER4 microprocessor and systems (for iSeries and pSeries). He is currently the POWER5 Microprocessor Core RAS design lead. Mr. Floyd has issued one U.S. patent with more than twenty pending and has reached IBM's Fifth Invention Plateau in addition to co-authoring two published papers.