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IBM Journal of Research and Development  
Volume 41, Numbers 4/5, 1997
IBM S/390 G3 and G4
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IBM S/390 Parallel Enterprise Servers G3 and G4 - Author bios

by G. S. Rao, T. A. Gregg, C. A. Price, C. L. Rao and S. J. Repka

Biographical sketches of authors

Gururaj S. Rao IBM System/390 Division, 522 South Road, Poughkeepsie, New York 12601 (gururao@vnet.ibm.com). Dr. Rao received his Bachelor of Engineering degree from the University of Mysore, India, his Master of Engineering degree from the Indian Institute of Science, India, and the Ph.D. degree from Stanford University, California, all in electrical engineering. He was an Assistant Professor of Electrical Engineering at Rice University, Houston, Texas, from 1975 to 1978. He joined the IBM Thomas J. Watson Research Center at Yorktown Heights, New York, in 1978, and worked on large-system processor structure studies. In 1983, Dr. Rao joined the Data Systems Division (now the System/390 Division) in Poughkeepsie, where he is currently the manager of the Processor Architecture and System Structure Department, with responsibility for developing future large-system requirements and architecture direction. Dr. Rao has received several academic honors as well as IBM awards. In 1991, he was appointed a Senior Technical Staff Member.

Thomas A. Gregg IBM System/390 Division, 522 South Road, Poughkeepsie, New York 12601 (GREGG at PKEDVM9, tomgregg@us.ibm.com). Mr. Gregg is a Senior Technical Staff Member in the S/390 System Design group. He received an SC.B. degree in engineering from Brown University in 1972 and continued his studies under a university fellowship, receiving an SC.M. degree in electrical engineering in 1974. He joined IBM at the Poughkeepsie Laboratory in 1973. Mr. Gregg has held various technical positions in the area of I/O subsystem design. He holds numerous patents utilized in IBM ESCON and Intersystem Channel products, and has received eight IBM Invention Achievement Awards. He received an IBM Outstanding Innovation Award and an IBM Corporate Award for work on ESCON products, and an IBM Outstanding Innovation Award for work on Intersystem Channel products.

Cyril A. Price IBM System/390 Division, 522 South Road, Poughkeepsie, New York 12601 (PRICECA at IBMUSM10, priceca@us.ibm.com). Dr. Price is Program Manager of CEC Subsystems in the S/390 Hardware Development Product Line Management organization, currently working on the development of the IBM S/390 CMOS servers. He graduated from Pratt Institute with a B.E.E. degree in 1969, and received his M.S.E.E. and D.E.E. degrees from Syracuse University in 1977 and 1986, respectively. He joined IBM in 1969 as a circuit/chip designer and then served two years as a U.S. Army Signal Corps officer. In 1978 he was named manager of Circuit and Subsystem Design. From 1979 to 1981, he was Manager of LSI Design and Manager of Exploratory Circuits. From 1981 to 1992, he held several management positions, including Advanced Design Manager responsible for CMOS chip development, and IBM Kingston Technology Manager responsible for technology support of IBM Enterprise System/9000 Type 9121 air-cooled processors. Dr. Price has received an IBM Outstanding Technical Achievement Award and an IBM Invention Achievement Award for patents and technical disclosures. In 1992 he was named Manager of Advanced Development, responsible for the initial research and development and successful product introduction of the IBM S/390 G4 microprocessor.

Chitta L. Rao IBM System/390 Division, 522 South Road, Poughkeepsie, New York 12601 (clrao@vnet.ibm.com). Dr. Rao is with the S/390 platform management area, working on Parallel Sysplex performance. He received an M.S. in electrical engineering from McGill University, Montreal, Canada, and a Ph.D. in theoretical nuclear physics from the University of Tennessee. Prior to joining IBM, Dr. Rao was engaged in research in nuclear physics, digital filters, and image processing. He joined IBM to work on large-system scientific and engineering processor design and development. Since 1991 he has been involved in the performance analysis of coupling facility design alternatives and Parallel Sysplex system performance.

Steven J. Repka IBM System/390 Division, 522 South Road, Poughkeepsie, New York 12601 (srepka@vnet.ibm.com). Mr. Repka is a Senior Engineer working in the S/390 System Design group. He received a B.S. in computer engineering from Case Western Reserve University in 1978, joining IBM at the Poughkeepsie Laboratory that same year. He has held a variety of technical and managerial positions in processor design, engineering systems test, and field product support. Mr. Repka has worked on the development of S/390 large systems, including the 3090 and ES/9000 processor families, and, most recently, the S/390 G4 server.