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Volume 39, Numbers 1/2, 1995
IBM CMOS Technology |
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Table of contents:  HTML |
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Copyright info |
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Interconnect design with VLSI CMOS |
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by R. F. Sechler |
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Historically, high-performance logic circuit interchip design has
focused on bipolar emitter-coupled logic (ECL) circuits and signals, but
VLSI CMOS has attained performance levels at which problems unique to
its characteristics must be addressed for design optimization. In this
paper, CMOS interchip circuit models are applied to develop packaging
and wiring constraints for synchronous communication.
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