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Volume 39, Numbers 1/2, 1995
IBM CMOS Technology |
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Table of contents:  HTML |
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Copyright info |
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Integrated cost and productivity learning in CMOS semiconductor manufacturing |
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by G. A. Leonovich, A. P. Franchino, W. J. Miller, and U. E. Tsou |
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This paper describes a cost and productivity learning process that was
carried out on a large-capacity CMOS manufacturing line at the IBM
Burlington facility from 1991 to 1993. Major productivity gains were
realized through process and tool improvements affecting yield, and
through work-in-progress optimization and scrap reduction. Significant
cost learning was also accomplished through tool cost management, capital
depreciation and space cost reductions, and manpower optimization.
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