|
|
 |
|
 |
Volume 39, Numbers 1/2, 1995
IBM CMOS Technology |
|
Table of contents: HTML |
|
|
Copyright info |
 |
 |
 |
 |
| |
|
A low-noise TTL-compatible CMOS off-chip driver circuit |
 |
by S. H. Dhong, M. Tanaka, S. W. Tomashot, and T. Kirihata |
 |
 |
 |
 |
|
Low-noise TTL-compatible off-chip driver (OCD) circuits are very
important, especially for low-power electronics, but scaled-down CMOS
technology requires a lower operating voltage of 3.3 V, while most
applications require 5 V. The dual power-supply requirement makes the
design of OCD challenging, first because pull-up devices, especially
p-MOS devices, must be able to handle an off-chip voltage of 5.6 V,
which is higher than an on-chip VDD of 2.8 V, and second because
pull-down devices should be able to discharge a capacitive load of 5.6 V
while operating at a minimum on-chip VDD of 2.8 V. This extreme
difference in operating voltage makes the circuits susceptible to
ringing and performance degradation due to hot-electron effects. In
this paper, we describe a low-noise OCD which has been successfully used
in IBM second-generation 4Mb low-power DRAM (LPDRAM) and in other
products. For pull-ups, two stacked p-MOS devices with floating n-wells
are used, but they are operated in different modes depending on the
supply voltage. The pull-down devices are basically composed of two
stages, one of which is in the diode configuration with its gate and
drain shorted together during the pull-down. Detailed circuit designs
to achieve low noise while meeting the performance requirements are
described.
|
 |
 |
|
|
 |
|
|