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Volume 39, Numbers 1/2, 1995
IBM CMOS Technology |
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Table of contents:  HTML |
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Copyright info |
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High-level synthesis in an industrial environment |
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by R. A. Bergamaschi, R. A. O'Connor, L. Stok, M. Z. Moricz, S. Prakash, A. Kuehlmann, and D. S. Rao |
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The use of modern hardware-description languages in the chip design
process has allowed designs to be modeled at higher abstraction levels.
More powerful modeling styles, such as register-transfer and behavioral
level specifications, have spurred the development of high-level
synthesis techniques in both industry and academia. However, despite
the many research efforts, the technology is not yet in widespread use
in industry. This paper presents the IBM High-Level Synthesis System
(HIS), which is the first such system to be used in production in IBM.
HIS synthesizes gate-level networks from VHDL models at various levels of
abstraction. The main algorithms, modeling capabilities, and
methodology considerations in the HIS system are presented. Results
show that HIS is capable of producing implementations comparable to or
better than those of the existing methodology, while shortening the
design time significantly. The HIS system is currently in production
use and evaluation in several IBM sites for processors and peripheral
chip designs, as well as being an external commercial product.
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